Messages in this thread | | | Subject | Re: serial.c (fifo) (2nd posting) | Date | Tue, 26 Oct 1999 10:25:46 +0200 (MEST) | From | (Rogier Wolff) |
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Theodore Y. Ts'o wrote: > Date: Sat, 23 Oct 1999 14:54:37 +0200 (MEST) > From: kees <kees@schoen.nl> > > For programming the FCR register there is stated: > > FCR bit 0: logic 0 disable xmit and recv fifo > FCR bit 0: logic 1 enable xmit and recv fifo; > THIS BIT MUST BE A LOGIC '1' WHEN OTHER FCR BITS ARE WRITTEN or > they will NOT BE PROGRAMMED. > > I found a few spots where the fcr bits were written but without > bit 0 SET in the resulting pattern. > > I've checked a couple of spec sheets, and yes, this seems to be right. > > The two places FCR_ENABLE isn't set while writing to the FCR register is > where we're trying to clear the FIFO's while resetting the UART, while it > doesn't seem to have made any difference, it would be good to this > fixed.
I vaguely remember that clearing that bit was part of the protocol of clearing the FIFO, but my docs don't directly confirm this.
Be careful, Ted!
Roger.
-- ** R.E.Wolff@BitWizard.nl ** http://www.BitWizard.nl/ ** +31-15-2137555 ** *-- BitWizard writes Linux device drivers for any device you may have! --* "I didn't say it was your fault. I said I was going to blame it on you."
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