Messages in this thread | | | From | Steve VanDevender <> | Date | Sun, 31 Jan 1999 14:05:20 -0800 (PST) | Subject | Re: Page coloring HOWTO [ans] |
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Larry McVoy writes: > davem@redhat.com (Hey, look where Dave is :-) says: > > : Page coloring, in the sense that we are talking about here, > : is %99 dealing with physically indexed secondary/third-level > : etc. caches. Virtually indexed secondary/third-level caches > : are dinosaurs > > Are you sure about that? We should come to agreement on terminology. > I thought that the HyperSparc was virtually indexed and virtually tagged, > with just about everything else being virtually indexed but physically > tagged.
Most of the x86 L2 direct-mapped cache systems I've seen would appear to be physically indexed and physically tagged, if I understand your terminology correctly. The processor presents physical addresses to the L2 cache, and the cache uses some of the high-order physical address bits to tag cache lines.
I suppose there could have been virtually-indexed caches in the days when the MMU was almost always external to the CPU, but I'm not aware of any recent architectures where the processor's external address bus uses virtual addresses.
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