lkml.org 
[lkml]   [1999]   [Jan]   [17]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
Date
From
SubjectRe: [PATCH] New: AMD K6 write allocate
>       You patch is OK.  Just two minor comments:
>
> 1) make the enable_write_allocate an _initfunc so that the code is
> discarded after boot and doesn't bloat other people's kernels (who may
> not have an AMD).

I did it;

and I did some more changes:

* Cosmetic cleanup (thanks to Philipp Rumpf)
* fix nasty bug - enabling write allocate failed if RAM size was 128MB or
greater

> 2) Move the code to the amd_model function. Although currently that
> function is misnamed, since it's used for the Cyrix MediaGX detection
> too.
> Probably separate the extended cpuid part, from the real AMD specific
> part. That will save some branch code (for what that may be worth).

I didn't do it. I should look and think, how to do in the best way.

--
With best wishes,
Alexey Vyskubov.
This is a message. Or something silly like that.
--- linux/arch/i386/kernel/setup.c.was Sun Jan 17 12:17:11 1999
+++ linux/arch/i386/kernel/setup.c Sun Jan 17 23:14:26 1999
@@ -601,6 +601,30 @@
static char *cpu_vendor_names[] __initdata = {
"Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur" };

+#define AMD_WHCR 0xc0000082 /* AMD MSR WHCR */
+
+__initfunc(u32 enable_write_allocate (u32 size))
+{
+ u32 ra, rd;
+ rd = 0;
+
+ ra = size >> 2; /* EAX = 2*(RAM/4) */
+ ra = (ra << 1) | 1; /* +1 for no memory hole at 15-16MB */
+
+
+#define walloc(msr, val1, val2) __asm__ __volatile__ (" pushf
+ cli
+ wbinvd
+ wrmsr
+ popf"\
+ : /* no outputs */\
+ : "c" (msr),\
+ "a" (val1), "d" (val2))
+ walloc(AMD_WHCR, ra, rd);
+ rdmsr(AMD_WHCR, ra, rd); /* Let's see what's happened */
+ ra = (ra & 0xfe) << 1; /* Drop last bit (memory hole) */
+ return(ra);
+}

__initfunc(void print_cpu_info(struct cpuinfo_x86 *c))
{
@@ -621,8 +645,51 @@

if (c->x86_mask || c->cpuid_level>=0)
printk(" stepping %02x", c->x86_mask);
-
- if(c->x86_vendor == X86_VENDOR_CENTAUR)
+
+ if ( (c->x86_vendor == X86_VENDOR_AMD) &&
+ ((c->x86_model == 6) || (c->x86_model == 7)))
+ {
+
+ u32 ra, rd;
+ u32 ram;
+
+ printk("\nAMD K6 processor, model %d found.", c->x86_model);
+ printk("\nChecking write allocate state... ");
+
+ ram = max_mapnr * (PAGE_SIZE >> 10); /* RAM size in Kb */
+ ram >>= 10; /* RAM size in Mb */
+
+ rdmsr(AMD_WHCR, ra, rd);
+ ra = (ra & 0xfe) << 1;
+
+ if (ra) {
+ printk("Write allocate is enabled for %d MB of memory", ra);
+ } else {
+ printk("Write allocate is disabled.");
+ }
+
+ if (!(ra == ram)) {
+ printk("\nTrying to enable write alocate for %d MB of memory", ram);
+ ra = enable_write_allocate(ram);
+
+ if (!(ra == ram)) {
+ printk("\nFailed!!!");
+ }
+ printk("\nWrite allocate is enabled for %d MB of memory", ra);
+ }
+
+ rdmsr(AMD_WHCR, ra, rd);
+
+ if (ra & 0x100) {
+ printk("\nWARNING: WCDE bit is 1.");
+ }
+
+ if (!(ra & 0x1)) {
+ printk("\nWARNING: Memory hole at 15-16M is enabled.");
+ }
+ }
+
+ if (c->x86_vendor == X86_VENDOR_CENTAUR)
{
u32 hv,lv;
rdmsr(0x107, lv, hv);
\
 
 \ /
  Last update: 2005-03-22 13:49    [W:0.042 / U:0.144 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site