Messages in this thread | | | From | tenthumbs@cybernex ... | Subject | Re: [PATCH] NMI trap revised (was Re: NMI errors in 2.0.30??) | Date | Thu, 08 May 1997 23:16:08 GMT |
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On Wed, 7 May 1997 22:10:37 +0200 (MET DST), you wrote:
> I was following the NMI discussion and today I have fond, under a pile of > old DDJ issues, an old manual which explain something (really not much) > about NMI on the old 80286 PC/XT. Supposing the NMI mechanism is not > changed for (23456)86, this is a patch that can help detect if the NMI is > a real hardware failure or triggered by something else. > > [skipped] >
My references say that bits 6 and 7 of port 0x61 are valid only if you set bits 2 and 3 to one. Bit 2 controls RAM parity error and bit 3 controls IO parity. To set this up, you have to say something like: outb( inb_p(0x61) | 0x0C, 0x61); but I didn't find this in the kernel anywhere, so your code may not do anything.
John
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