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SubjectRe: Dirty patch saving 260K on Triton

What about memory maped cards that live in the mentioned address range ?
etc Some(all ?) 3Com ISA cards, Specialix SI/XIO card....

Would it be possible to open a 16/32/64K hole in there somewhere ?
eg 0x0d000 -> 0x0d7fff.

Best regards
Mark Harvey


On Wed, 7 May 1997, Martin Mares wrote:

> Hi,
>
> I've looked a bit on the Triton chipset and I noticed that it's possible to
> control memory mapping in the 0xC0000-0xFFFFF region (other PCI chipsets are
> usually also capable of such things, but I'll look at them later). I've written
> a very experimental patch filling the whole region with RAM (throwing out all
> BIOSes) and thus gaining 256K (additional 4K come from the 0x9C000 page which
> needn't to be reserved in such cases).
>
> This patch breaks:
>
> - PCI BIOS access (completely disabled by the patch and direct HW access
> is used instead => everything should work well)
>
> - APM
>
> - Rebooting thru BIOS
>
> Look at it, test it, do anything you want with it...
>
> Current plans what to do next: write generic chipset support for Linux
> allowing other extensions to be used (32-bit DMA addressing and so on)...
>
> Good luck
> Martin
>
>
> --- arch/i386/mm/init.c.old Tue May 6 19:15:07 1997
> +++ arch/i386/mm/init.c Tue May 6 19:20:05 1997
> @@ -26,6 +26,7 @@
> #include <asm/uaccess.h>
> #include <asm/pgtable.h>
> #include <asm/dma.h>
> +#include <asm/io.h>
>
> const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n";
>
> @@ -292,6 +293,7 @@
> #endif
> start_mem = PAGE_ALIGN(start_mem);
>
> +#ifdef NO_DIRTY_MM_TRICKS_FOR_TRITON
> /*
> * IBM messed up *AGAIN* in their thinkpad: 0xA0000 -> 0x9F000.
> * They seem to have done something stupid with the floppy
> @@ -301,6 +303,29 @@
> clear_bit(PG_reserved, &mem_map[MAP_NR(start_low_mem)].flags);
> start_low_mem += PAGE_SIZE;
> }
> +#else
> + /*
> + * These hacks are only for Intel Triton chipsets, so we don't
> + * expect any odd ThinkPad behaviour.
> + */
> + while (start_low_mem < 0xa0000+PAGE_OFFSET) {
> + clear_bit(PG_reserved, &mem_map[MAP_NR(start_low_mem)].flags);
> + start_low_mem += PAGE_SIZE;
> + }
> + save_flags(tmp); /* Mark 0xc0000-0xcffff as readable, writeable and cacheable */
> + cli();
> + outl(0x80000058, 0xcf8);
> + outl((inl(0xcfc) & 0x000000ff) | 0x77777000, 0xcfc);
> + outl(0x8000005c, 0xcf8);
> + outl(0x77777777, 0xcfc);
> + outl(0, 0xcf8);
> + restore_flags(tmp);
> + start_low_mem = PAGE_OFFSET + 0xc0000; /* And add them to the memory pool */
> + while (start_low_mem < 0x100000+PAGE_OFFSET) {
> + clear_bit(PG_reserved, &mem_map[MAP_NR(start_low_mem)].flags);
> + start_low_mem += PAGE_SIZE;
> + }
> +#endif
>
> while (start_mem < end_mem) {
> clear_bit(PG_reserved, &mem_map[MAP_NR(start_mem)].flags);
> --- arch/i386/kernel/bios32.c.old Tue May 6 19:46:59 1997
> +++ arch/i386/kernel/bios32.c Tue May 6 19:51:35 1997
> @@ -889,6 +889,7 @@
> *
> */
>
> +#ifdef NO_DIRTY_MM_TRICKS_FOR_TRITON
> for (check = (union bios32 *) __va(0xe0000);
> check <= (union bios32 *) __va(0xffff0);
> ++check) {
> @@ -921,6 +922,12 @@
> }
> if (bios32_entry && check_pcibios())
> access_pci = &pci_bios_access;
> +#else
> + /* We must disable PCI BIOS support for the Triton MM hack,
> + * but we can simply use direct access instead.
> + */
> + access_pci = check_direct_pci();
> +#endif
> #endif
> return memory_start;
> }
>


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