Messages in this thread | | | Date | Thu, 26 Dec 1996 17:06:21 +0000 (GMT) | From | Mark Hemment <> | Subject | Re: detecting > 64M on x86 |
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Hi,
> Unfortunately, there is no BIOS function at this time that will report > the maximum address of cacheable memory. The warning would have to be > chipset-based (i.e. detect which chipset is on the board and display the > warning if it is appropriate); this is probably doable since there are not that > many chipsets floating around anyway.
Opps, must have missed understood your post regarding what info is available.
I'm sure this has been based around before, but what about systems without extended BIOS functions? Is it possible to probe memory by writing/reading a pattern.... I understand some L2 caches will actually cache writes to invalid addresses, but playing games with the cache it should be possible to work around this. Another problem is 'reflections'. Where a write to an invalid page will cause the pattern to appear in a lower page (probably page zero).
I know SCO use a probe to detect memory, and they have got it correct on all systems I've used (although I'm sure someone has a story where they haven't :)
Regards,
markhe
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