Messages in this thread | | | Date | Fri, 26 Apr 2024 14:30:37 -0700 | From | Charlie Jenkins <> | Subject | Re: [PATCH 1/2] riscv: cpufeature: Fix thead vector hwcap removal |
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On Fri, Apr 26, 2024 at 11:02:30AM +0200, Andrew Jones wrote: > On Wed, Apr 24, 2024 at 09:19:54AM GMT, Charlie Jenkins wrote: > ... > > + /* > > + * Naively assume that all harts have the same mvendorid/marchid as the > > + * boot hart. > > This comment isn't necessary, since we don't have to assume all harts have > the same IDs. This information is currently being collected specifically > for thead. So, we can state in a comment below, where the information is > used, that we assume when the boot hart is thead, then we don't want to > enable V on any hart (whatever their IDs are).
Yes you are correct, I will do as you suggest.
- Charlie
> > Thanks, > drew > > > + */ > > + boot_vendorid = riscv_get_mvendorid(); > > + boot_archid = riscv_get_marchid(); > > + > > for_each_possible_cpu(cpu) { > > struct riscv_isainfo *isainfo = &hart_isa[cpu]; > > unsigned long this_hwcap = 0; > > @@ -544,8 +553,7 @@ static void __init riscv_fill_hwcap_from_isa_string(unsigned long *isa2hwcap) > > * CPU cores with the ratified spec will contain non-zero > > * marchid. > > */ > > - if (acpi_disabled && riscv_cached_mvendorid(cpu) == THEAD_VENDOR_ID && > > - riscv_cached_marchid(cpu) == 0x0) { > > + if (acpi_disabled && boot_vendorid == THEAD_VENDOR_ID && boot_archid == 0x0) { > > this_hwcap &= ~isa2hwcap[RISCV_ISA_EXT_v]; > > clear_bit(RISCV_ISA_EXT_v, isainfo->isa); > > } > > > > -- > > 2.44.0 > > > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv
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