lkml.org 
[lkml]   [2024]   [Apr]   [18]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 2/2] arm64/cpufeature: Replace custom macros with fields from ID_AA64PFR0_EL1
    Date
    This replaces custom macros usage (i.e ID_AA64PFR0_EL1_ELx_64BIT_ONLY and
    ID_AA64PFR0_EL1_ELx_32BIT_64BIT) and instead directly uses register fields
    from ID_AA64PFR0_EL1 sysreg definition. Finally let's drop off both these
    custom macros as they are now redundant.

    Cc: Catalin Marinas <catalin.marinas@arm.com>
    Cc: Will Deacon <will@kernel.org>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Mark Brown <broonie@kernel.org>
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
    ---
    arch/arm64/include/asm/cpufeature.h | 4 ++--
    arch/arm64/include/asm/sysreg.h | 4 ----
    arch/arm64/kernel/cpufeature.c | 4 ++--
    3 files changed, 4 insertions(+), 8 deletions(-)

    diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
    index 8b904a757bd3..558434267271 100644
    --- a/arch/arm64/include/asm/cpufeature.h
    +++ b/arch/arm64/include/asm/cpufeature.h
    @@ -588,14 +588,14 @@ static inline bool id_aa64pfr0_32bit_el1(u64 pfr0)
    {
    u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_EL1_SHIFT);

    - return val == ID_AA64PFR0_EL1_ELx_32BIT_64BIT;
    + return val == ID_AA64PFR0_EL1_EL1_AARCH32;
    }

    static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
    {
    u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_EL0_SHIFT);

    - return val == ID_AA64PFR0_EL1_ELx_32BIT_64BIT;
    + return val == ID_AA64PFR0_EL1_EL0_AARCH32;
    }

    static inline bool id_aa64pfr0_sve(u64 pfr0)
    diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
    index 9e8999592f3a..1199185a3da9 100644
    --- a/arch/arm64/include/asm/sysreg.h
    +++ b/arch/arm64/include/asm/sysreg.h
    @@ -872,10 +872,6 @@
    /* Position the attr at the correct index */
    #define MAIR_ATTRIDX(attr, idx) ((attr) << ((idx) * 8))

    -/* id_aa64pfr0 */
    -#define ID_AA64PFR0_EL1_ELx_64BIT_ONLY 0x1
    -#define ID_AA64PFR0_EL1_ELx_32BIT_64BIT 0x2
    -
    /* id_aa64mmfr0 */
    #define ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN 0x0
    #define ID_AA64MMFR0_EL1_TGRAN4_LPA2 ID_AA64MMFR0_EL1_TGRAN4_52_BIT
    diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
    index 56583677c1f2..c041b0958f53 100644
    --- a/arch/arm64/kernel/cpufeature.c
    +++ b/arch/arm64/kernel/cpufeature.c
    @@ -285,8 +285,8 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {
    S_ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_FP_SHIFT, 4, ID_AA64PFR0_EL1_FP_NI),
    ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_EL3_SHIFT, 4, 0),
    ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_EL2_SHIFT, 4, 0),
    - ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_EL1_SHIFT, 4, ID_AA64PFR0_EL1_ELx_64BIT_ONLY),
    - ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_EL0_SHIFT, 4, ID_AA64PFR0_EL1_ELx_64BIT_ONLY),
    + ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_EL1_SHIFT, 4, ID_AA64PFR0_EL1_EL1_IMP),
    + ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR0_EL1_EL0_SHIFT, 4, ID_AA64PFR0_EL1_EL0_IMP),
    ARM64_FTR_END,
    };

    --
    2.25.1

    \
     
     \ /
      Last update: 2024-05-27 16:44    [W:6.120 / U:0.012 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site