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    Subject[PATCH v7 3/5] PCI: dwc: Add outbound MSG TLPs support
    From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

    Add "code" and "routing" into struct dw_pcie_ob_atu_cfg for triggering
    INTx IRQs by iATU in the PCIe endpoint mode in near the future.
    PCIE_ATU_INHIBIT_PAYLOAD is set to issue TLP type of Msg instead of
    MsgD. So, this implementation supports the data-less messages only
    for now.

    Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
    Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
    Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
    Signed-off-by: Frank Li <Frank.Li@nxp.com>
    ---
    drivers/pci/controller/dwc/pcie-designware.c | 9 +++++++--
    drivers/pci/controller/dwc/pcie-designware.h | 4 ++++
    2 files changed, 11 insertions(+), 2 deletions(-)

    diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
    index df2575ec5f44c..ba909fade9db1 100644
    --- a/drivers/pci/controller/dwc/pcie-designware.c
    +++ b/drivers/pci/controller/dwc/pcie-designware.c
    @@ -499,7 +499,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
    dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_TARGET,
    upper_32_bits(atu->pci_addr));

    - val = atu->type | PCIE_ATU_FUNC_NUM(atu->func_no);
    + val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no);
    if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) &&
    dw_pcie_ver_is_ge(pci, 460A))
    val |= PCIE_ATU_INCREASE_REGION_SIZE;
    @@ -507,7 +507,12 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
    val = dw_pcie_enable_ecrc(val);
    dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val);

    - dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, PCIE_ATU_ENABLE);
    + val = PCIE_ATU_ENABLE;
    + if (atu->type == PCIE_ATU_TYPE_MSG) {
    + /* The data-less messages only for now */
    + val |= PCIE_ATU_INHIBIT_PAYLOAD | atu->code;
    + }
    + dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL2, val);

    /*
    * Make sure ATU enable takes effect before any subsequent config
    diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
    index d21db82e586d5..703b50bc5e0f1 100644
    --- a/drivers/pci/controller/dwc/pcie-designware.h
    +++ b/drivers/pci/controller/dwc/pcie-designware.h
    @@ -148,11 +148,13 @@
    #define PCIE_ATU_TYPE_IO 0x2
    #define PCIE_ATU_TYPE_CFG0 0x4
    #define PCIE_ATU_TYPE_CFG1 0x5
    +#define PCIE_ATU_TYPE_MSG 0x10
    #define PCIE_ATU_TD BIT(8)
    #define PCIE_ATU_FUNC_NUM(pf) ((pf) << 20)
    #define PCIE_ATU_REGION_CTRL2 0x004
    #define PCIE_ATU_ENABLE BIT(31)
    #define PCIE_ATU_BAR_MODE_ENABLE BIT(30)
    +#define PCIE_ATU_INHIBIT_PAYLOAD BIT(22)
    #define PCIE_ATU_FUNC_NUM_MATCH_EN BIT(19)
    #define PCIE_ATU_LOWER_BASE 0x008
    #define PCIE_ATU_UPPER_BASE 0x00C
    @@ -303,6 +305,8 @@ struct dw_pcie_ob_atu_cfg {
    int index;
    int type;
    u8 func_no;
    + u8 code;
    + u8 routing;
    u64 cpu_addr;
    u64 pci_addr;
    u64 size;
    --
    2.34.1


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