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    SubjectRe: [PATCH v1 2/6] powerpc/8xx: Always pin kernel text TLB
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    Le 09/12/2020 à 11:43, Michael Ellerman a écrit :
    > Christophe Leroy <christophe.leroy@csgroup.eu> writes:
    >> There is no big poing in not pinning kernel text anymore, as now
    >> we can keep pinned TLB even with things like DEBUG_PAGEALLOC.
    >>
    >> Remove CONFIG_PIN_TLB_TEXT, making it always right.
    >>
    >> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
    >> ---
    >> arch/powerpc/Kconfig | 3 +--
    >> arch/powerpc/kernel/head_8xx.S | 20 +++-----------------
    >> arch/powerpc/mm/nohash/8xx.c | 3 +--
    >> arch/powerpc/platforms/8xx/Kconfig | 7 -------
    >> 4 files changed, 5 insertions(+), 28 deletions(-)
    >>
    > ...
    >> diff --git a/arch/powerpc/mm/nohash/8xx.c b/arch/powerpc/mm/nohash/8xx.c
    >> index 231ca95f9ffb..19a3eec1d8c5 100644
    >> --- a/arch/powerpc/mm/nohash/8xx.c
    >> +++ b/arch/powerpc/mm/nohash/8xx.c
    >> @@ -186,8 +186,7 @@ void mmu_mark_initmem_nx(void)
    >> mmu_mapin_ram_chunk(0, boundary, PAGE_KERNEL_TEXT, false);
    >> mmu_mapin_ram_chunk(boundary, einittext8, PAGE_KERNEL, false);
    >>
    >> - if (IS_ENABLED(CONFIG_PIN_TLB_TEXT))
    >> - mmu_pin_tlb(block_mapped_ram, false);
    >> + mmu_pin_tlb(block_mapped_ram, false);
    >> }
    >
    > This broke mpc885_ads_defconfig with:

    :surprise:

    How did I get it working ? Anyway, thanks for fixing it.

    Christophe


    >
    > ld: arch/powerpc/mm/nohash/8xx.o: in function `mmu_mark_initmem_nx':
    > /home/michael/linux/arch/powerpc/mm/nohash/8xx.c:189: undefined reference to `mmu_pin_tlb'
    > make[1]: *** [/home/michael/linux/Makefile:1164: vmlinux] Error 1
    > make: *** [Makefile:185: __sub-make] Error 2
    >
    > Fixed by:
    >
    > diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
    > index 35707e86c5f3..52702f3db6df 100644
    > --- a/arch/powerpc/kernel/head_8xx.S
    > +++ b/arch/powerpc/kernel/head_8xx.S
    > @@ -702,7 +702,6 @@ FixupDAR:/* Entry point for dcbx workaround. */
    > mtspr SPRN_DER, r8
    > blr
    >
    > -#ifdef CONFIG_PIN_TLB
    > _GLOBAL(mmu_pin_tlb)
    > lis r9, (1f - PAGE_OFFSET)@h
    > ori r9, r9, (1f - PAGE_OFFSET)@l
    > @@ -802,7 +801,6 @@ _GLOBAL(mmu_pin_tlb)
    > mtspr SPRN_SRR1, r10
    > mtspr SPRN_SRR0, r11
    > rfi
    > -#endif /* CONFIG_PIN_TLB */
    >
    > /*
    > * We put a few things here that have to be page-aligned.
    >
    >
    > cheers
    >

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