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    SubjectRE: [PATCH bpf-next v4 07/11] bpf: Add instructions for atomic_[cmp]xchg
    Brendan Jackman wrote:
    > This adds two atomic opcodes, both of which include the BPF_FETCH
    > flag. XCHG without the BPF_FETCH flag would naturally encode
    > atomic_set. This is not supported because it would be of limited
    > value to userspace (it doesn't imply any barriers). CMPXCHG without
    > BPF_FETCH woulud be an atomic compare-and-write. We don't have such
    > an operation in the kernel so it isn't provided to BPF either.
    >
    > There are two significant design decisions made for the CMPXCHG
    > instruction:
    >
    > - To solve the issue that this operation fundamentally has 3
    > operands, but we only have two register fields. Therefore the
    > operand we compare against (the kernel's API calls it 'old') is
    > hard-coded to be R0. x86 has similar design (and A64 doesn't
    > have this problem).
    >
    > A potential alternative might be to encode the other operand's
    > register number in the immediate field.
    >
    > - The kernel's atomic_cmpxchg returns the old value, while the C11
    > userspace APIs return a boolean indicating the comparison
    > result. Which should BPF do? A64 returns the old value. x86 returns
    > the old value in the hard-coded register (and also sets a
    > flag). That means return-old-value is easier to JIT.
    >
    > Signed-off-by: Brendan Jackman <jackmanb@google.com>
    > ---

    Sorry if this is a dup, client crashed while I sent the previous version
    and don't see it on the list.

    > --- a/kernel/bpf/verifier.c
    > +++ b/kernel/bpf/verifier.c
    > @@ -3608,11 +3608,14 @@ static int check_mem_access(struct bpf_verifier_env *env, int insn_idx, u32 regn
    >
    > static int check_atomic(struct bpf_verifier_env *env, int insn_idx, struct bpf_insn *insn)
    > {
    > + int load_reg;
    > int err;
    >
    > switch (insn->imm) {
    > case BPF_ADD:
    > case BPF_ADD | BPF_FETCH:
    > + case BPF_XCHG:
    > + case BPF_CMPXCHG:
    > break;
    > default:
    > verbose(env, "BPF_ATOMIC uses invalid atomic opcode %02x\n", insn->imm);
    > @@ -3634,6 +3637,13 @@ static int check_atomic(struct bpf_verifier_env *env, int insn_idx, struct bpf_i
    > if (err)
    > return err;
    >
    > + if (insn->imm == BPF_CMPXCHG) {
    > + /* Check comparison of R0 with memory location */
    > + err = check_reg_arg(env, BPF_REG_0, SRC_OP);
    > + if (err)
    > + return err;
    > + }
    > +

    Need to think a bit more on this, but do we need to update is_reg64() here
    as well?

    > if (is_pointer_value(env, insn->src_reg)) {
    > verbose(env, "R%d leaks addr into mem\n", insn->src_reg);
    > return -EACCES;
    > @@ -3664,8 +3674,13 @@ static int check_atomic(struct bpf_verifier_env *env, int insn_idx, struct bpf_i
    > if (!(insn->imm & BPF_FETCH))
    > return 0;
    >
    > - /* check and record load of old value into src reg */
    > - err = check_reg_arg(env, insn->src_reg, DST_OP);
    > + if (insn->imm == BPF_CMPXCHG)
    > + load_reg = BPF_REG_0;
    > + else
    > + load_reg = insn->src_reg;
    > +
    > + /* check and record load of old value */
    > + err = check_reg_arg(env, load_reg, DST_OP);
    > if (err)
    > return err;
    >

    Thanks,
    John

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