Messages in this thread | | | Date | Thu, 03 Dec 2020 23:47:54 -0000 | From | "tip-bot2 for Thomas Gleixner" <> | Subject | [tip: timers/core] Merge tag 'timers-v5.11' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core |
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The following commit has been merged into the timers/core branch of tip:
Commit-ID: fef92cd2bc04c64bb3743d40c0b4be47aedf9e23 Gitweb: https://git.kernel.org/tip/fef92cd2bc04c64bb3743d40c0b4be47aedf9e23 Author: Thomas Gleixner <tglx@linutronix.de> AuthorDate: Fri, 04 Dec 2020 00:39:45 +01:00 Committer: Thomas Gleixner <tglx@linutronix.de> CommitterDate: Fri, 04 Dec 2020 00:39:45 +01:00
Merge tag 'timers-v5.11' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clocksource/event driver updates from Daniel Lezcano:
- Add static annotation for the sp804 init functions (Zhen Lei)
- Code cleanups and error code path at init time fixes on the sp804 (Kefen Wang)
- Add new OST timer driver device tree bindings (Zhou Yanjie)
- Remove EZChip NPS clocksource driver corresponding to the NPS platform which was removed from the ARC architecture (Vineet Gupta)
- Add missing clk_disable_unprepare() on error path for Orion (Yang Yingliang)
- Add device tree bindings documentation for Renesas r8a774e1 (Marian-Cristian Rotariu)
- Convert Renesas TMU to json-schema (Geert Uytterhoeven)
- Fix memory leak on the error path at init time on the cadence_ttc driver (Yu Kuai)
- Fix section mismatch for Ingenic timer driver (Daniel Lezcano)
- Make RISCV_TIMER depends on RISCV_SBI (Kefeng Wang)
Link: https://lore.kernel.org/r/028084fa-d29b-a1d5-7eab-17f77ef69863@linaro.org ---
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