Messages in this thread | | | Date | Mon, 30 Sep 2013 11:51:06 -0700 | From | Andi Kleen <> | Subject | Re: [PATCHv6 00/22] Transparent huge page cache: phase 1, everything but mmap() |
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> AFAIK, this is not a problem in the vast majority of modern CPUs
Let's do some simple math: e.g. a Sandy Bridge system has 512 4K iTLB L2 entries. That's around 2MB. There's more and more code whose footprint exceeds that.
Besides iTLB is not the only target. It is also useful for data of course.
> > and I found it very hard to be motivated to review the series as a result. > > I suspected that in many cases that the cost of IO would continue to dominate > > performance instead of TLB pressure
The trend is to larger and larger memories, keeping things in memory.
In fact there's a good argument that memory sizes are growing faster than TLB capacities. And without large TLBs we're even further off the curve.
> Oh, one last thing I forgot. While tmpfs-based workloads were not likely to > benefit I would expect that sysV shared memory workloads would potentially > benefit from this. hugetlbfs is still required for shared memory areas > but it is not a problem that is addressed by this series.
Of course it's only the first step. But if noone does the babysteps then the other usages will also not ever materialize.
I expect once ramfs works, extending it to tmpfs etc. should be straight forward.
-Andi
-- ak@linux.intel.com -- Speaking for myself only
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