Messages in this thread | | | Date | Tue, 5 Dec 2006 21:14:56 +0200 | From | "Raz Ben-Jehuda(caro)" <> | Subject | Re: irq/0/smp_affinity =3 doesn't seem to work |
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On 12/5/06, Arjan van de Ven <arjan@infradead.org> wrote: > On Tue, 2006-12-05 at 18:30 +0200, Raz Ben-Jehuda(caro) wrote: > > hello. > > > > I have a dual cpu AMD machine, I noticed that > > only one timer0 is working in /proc/interrutps. > > setting proc/irq/0/smp_affinity to 3 does make > > any difference. > > if you set it to 3 then the chipset gets to decide where the irq goes. > Many decide to send it to the first cpu. > > (not that it matters, the timer is so low frequency that it can go > anywhere without problems) > > -- > if you want to mail me at work (you don't), use arjan (at) linux.intel.com > Test the interaction between Linux and your BIOS via http://www.linuxfirmwarekit.org > > thanks Arjan.
Yet something is not clear to me. To the best of my knowledge , each cpu run its own schedule routine. So, if only cpu0 gets timer0 interrupts, how does cpu1 gets to run the schedule function ? what interrupts cpu1' current task ?
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