Messages in this thread | ![/](/images/icornerl.gif) | | Subject | Re: [PATCH 7/9] atomic.h : powerpc | From | Benjamin Herrenschmidt <> | Date | Thu, 21 Dec 2006 14:15:05 +1100 |
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> + > +/** > + * atomic64_add_unless - add unless the number is a given value > + * @v: pointer of type atomic64_t > + * @a: the amount to add to v... > + * @u: ...unless v is equal to u. > + * > + * Atomically adds @a to @v, so long as it was not @u. > + * Returns non-zero if @v was not @u, and zero otherwise. > + */ > +static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) > +{ > + long t; > + > + __asm__ __volatile__ ( > + LWSYNC_ON_SMP > +"1: ldarx %0,0,%1 # atomic_add_unless\n\ > + cmpd 0,%0,%3 \n\ > + beq- 2f \n\ > + add %0,%2,%0 \n" > + PPC405_ERR77(0,%2) > +" stdcx. %0,0,%1 \n\ > + bne- 1b \n" > + ISYNC_ON_SMP > +" subf %0,%2,%0 \n\ > +2:" > + : "=&r" (t) > + : "r" (&v->counter), "r" (a), "r" (u) > + : "cc", "memory"); > + > + return t != u; > +} > +
You shouldn't try to define those when building 32 bits code... Also, the PPC405 errata, as it's name implies, is specific to 405 cores which are all 32 bits.
Ben.
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