Messages in this thread | | | Date | Wed, 24 Apr 2024 14:31:48 +0200 | From | Andrew Lunn <> | Subject | Re: [PATCH net-next] net: ti: icssg_prueth: Add SW TX / RX Coalescing based on hrtimers |
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On Wed, Apr 24, 2024 at 02:48:23PM +0530, MD Danish Anwar wrote: > Add SW IRQ coalescing based on hrtimers for RX and TX data path for ICSSG > driver, which can be enabled by ethtool commands: > > - RX coalescing > ethtool -C eth1 rx-usecs 50 > > - TX coalescing can be enabled per TX queue > > - by default enables coalesing for TX0 > ethtool -C eth1 tx-usecs 50 > - configure TX0 > ethtool -Q eth0 queue_mask 1 --coalesce tx-usecs 100 > - configure TX1 > ethtool -Q eth0 queue_mask 2 --coalesce tx-usecs 100 > - configure TX0 and TX1 > ethtool -Q eth0 queue_mask 3 --coalesce tx-usecs 100 --coalesce > tx-usecs 100 > > Minimum value for both rx-usecs and tx-usecs is 20us.
Do you have some benchmark numbers?
Did you see this patch on the mailing list:
https://lore.kernel.org/all/20240415094804.8016-1-paul.barker.ct@bp.renesas.com/T/#md50cb07bbdd6daf985f3796508cf4b246b085268
This is basically a one line change, which brings big performance gains. Did you try something as simple as that, rather than all your hrtimer code?
Andrew
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